When upgrading the FPGA on some MVX (MKI) cards using the direct Xilinx  tool, the upgrade process can sometimes fail.
There two possible issues

a) USB cable speed 
b) Device ID read error  

a) USB cable speed if you encounter this problem
To program the Xilinx PROM on a MVX (MKI) unit it is necessary to change the speed of the programming tool using Output > Cable Setup and setting the TCK Speed/Baud Rate to 1.5 MHz or less.

Always try this solution first for either failure mode 




b) Device ID read error if the Impact program displays "The idcode read from the device does not match the idcode in the bsdl File." The root cause of this is that the device manufacturer changed the Device ID on some variants of the xc18v04 device 
 
A number of factors may cause this bad read, but if the message repeats, even at slower cable speeds options include:
(i)To Change the bsdl file File location:C:\Xilinx\14.5\LabTools\LabTools\xc18v00\data or C:\Xilinx\13.1\ISE_DS\ISE\xc18v00\data\xc18v04.bsd Make sure to keep the original BSDLfile
See attached  From the internet In the Xilinx installation directory, Change the expected IDCODE from .bsd file.

 To do this: 
- search for xc18v04.bsd in Xilinx installation directory.- Use notepad to edit the file 
- change Part Number from  0101000000110110 to   0101000000100110 in the file. -Save the file, close and open impact. After doing this the prom is accessible from impact.
Or From internet To work around this issue, you will have to hand modify the IDCODE and change bit 16 to a '0' or to a Don't Care bit 'X' if you have both UMC and STMicro parts. This will now pass the Impact IDCODE check.

NOTE: Clear-Com have not tried this method of using an ‘X’ to indicate don’t care (so use with caution) but it  means you only need one bsdl file  (ii) Restart the Xilinx program application   and try to program the Xilinx device again.
(iii) Remember to put the cable speed back to 6Mhz -         Remember to put back the original BSDL file